The present invention relates in general to techniques for reducing power consumption of semiconductor integrated circuits. More particularly, the invention relates to techniques which are effectively utilized in semiconductor integrated circuits for processing data in which, for example, a CPU (Central Processing Unit) and its peripheral circuits are formed on one semiconductor chip, especially, in semiconductor integrated circuits for use in portable or mobile electronic devices which are operated by batteries or cells.
Heretofore, there is known a semiconductor IC (Integrated Circuit) such as a microcomputer adapted to stop a clock signal while supplying a power source voltage to the whole chip in a standby mode or the like to stop the operation of the circuits, thereby reducing the power consumption.
However, in such a system of reducing the power consumption on the basis of the stop of a clock signal, there is an inconvenience that since the operation of the circuits is stopped while supplying the power source voltage to the chip, if a leakage current occurs in a MOS FET and the like constituting the circuits, this results in that the power consumption is not sufficiently reduced. On the other hand, some of the semiconductor ICs are adapted in such a way that a part of the circuits in the inside of the chip is not operated, but other circuits are voltage is cut off for any of the circuits which does not need to be operated.
While the reduction of the power consumption is possible in the case where the inside of the chip is divided into a plurality of circuit blocks and the supply of the power source voltage to any of the circuit blocks which does not need to be operated is cut off, the states of the signals outputted from the circuit blocks for which the supply of the power source voltage is cut off become indefinite or indeterminate. For this reason, if each of the circuit blocks on the side of receiving such signals is being operated, there is the possibility that the malfunction of such circuits may occur.
Then, the present inventors have investigated with respect to such a system wherein an interface circuit is provided in each of circuit blocks and a signal inputted from a circuit block is cut off at the interface circuit, to which circuit block the supply of the power source voltage has been cut off.
However, in the above system, it is necessary to change the design of the circuit blocks for which the interface circuits are needed to be provided, respectively, and also this change needs to be carried out on the basis of taking the states of other circuit blocks into consideration. Therefore, the design thereof becomes very complicated. In addition, it has become clear that since it is necessary to add the interface circuit for each signal supplied from the circuit block to which the supply of the power source voltage is cut off, there is the inconvenience that the circuit area is increased to increase the chip size.